BGA packages which include a semiconductor chip (silicon die) mounted with a flip-chip connection onto a substrate having soldered outer balls arrayed in a grid pattern are well-known as semiconductor components (also referred to as “semiconductor devices” below). These types of BGA packages often use a construction in which protrusions for connecting so-called solder bumps are provided on a plurality of electrodes arrayed on the outer surface of the semiconductor chip so that electrodes on the substrate side are connected to electrodes on the semiconductor chip side through the solder bumps.
However, because the thermal expansion coefficients of the semiconductor chip and the substrate in a semiconductor device are normally different, there is a possibility the solder connection parts (joints) in the semiconductor device may be subject to stress due to heating (temperature) cycles caused by the semiconductor chip being turned on and off. Moreover, the solder connection parts may also undergo stress due to changes in the calorific content of the semiconductor chip due to changes in the operating conditions such as changes in the amount of signals for processing in the semiconductor chip. As a result, the solder connection parts may crack which may lead to disconnections. This reduction in the joint reliability of the solder connection parts is often exposed with the advance in size reductions and pitch reductions of the solder bumps and solder outer balls accompanying the reduction in the sizes of the packages.
The following are reference documents.    [Document 1] Japanese Laid-Open Patent Publication No. 07-201919 and    [Document 2] Japanese National Publication of International Patent Application No. 2008-537637.